Peter Gerwinski <peter@agnes.dida.physik.uni-essen.de> wrote:

Or else: Loading the memory reference into a register and pushing that *might* be faster than a direct push (don't know).

Just little clarifying.....:)) No. Surely not on 80x86 machines. Look this (is for Pentium): 1 push (mem) take 2 cycles NOT pairable 2 a) mov (mem), reg take 1 cycle pairable AGI Stall (1 cycle+cut off pairing system) b) push reg take 1 cycle pairable TOTAL: 3 cycles Well, is 2 (not pairable) versus 2 1/2 (not pairable) cycles..... However, with a manual re-ordering it could take only 1 cycle...8-)) Hope this clarify...... Cya PrZ. -- [<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<] | Codename: PrEdAtOr~Z; Sex: Male; Status: Free coder | * E-mail: predatorzeta@geocities.com * | URL: http://www.geocities.com/SiliconValley/Vista/6573 | [>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>]