CBFalconer wrote:
End of quick course in Karnaugh maps and logical reductions thereby :-)
Thanks. BTW, do you have a background in electrical circuit design or something like this? I can imagine that such diagrams are quite useful there, to minimize the number of logic elements required etc. However, in programming, at least in my experience, I often start to break down cases into subcases etc., repeatedly, which leads quite naturally to a structure of nested `if's. Any rearrangement of them (whether to avoid dangling `else's, or for other reasons) makes the result usually look less natural to me because the original ideas that lead to the cases are hidden. More or less the same holds in complicated Boolean expressions. Of course, sometimes it turns out that the case distinctions are wrong, and must be changed substantially. In such a situation, I can imagine that such a diagram makes it easy to identify in which cases the result is actually changed (which should be few, but including the ones where problems were discovered), as an affirmation that the rearrangment is useful. (For such purposes, I sometimes write tables, but more often work with De Morgan and distributive laws). Frank -- Frank Heckenbach, frank@g-n-u.de, http://fjf.gnu.de/, 7977168E GPC To-Do list, latest features, fixed bugs: http://www.gnu-pascal.de/todo.html GPC download signing key: 51FF C1F0 1A77 C6C2 4482 4DDC 117A 9773 7F88 1707